FPGA Engineer
Turion Space
Irvine, CA, USA
Posted on Feb 13, 2025
Introduction -
Turion Space is seeking a highly skilled FPGA Engineer to join our team. As an FPGA Engineer at Turion, you will be responsible for implementing RTL designs for image sensor configuration, readout, RAM buffering, and signal processing algorithms. Additionally, the role will involve developing and optimizing FPGA applications across various payload RDT&E projects and spacecraft bus development. The ideal candidate should have a strong background in digital design, VHDL/Verilog/SystemVerilog programming, and experience with FPGA development tools and methodologies.
Turion Space is seeking a highly skilled FPGA Engineer to join our team. As an FPGA Engineer at Turion, you will be responsible for implementing RTL designs for image sensor configuration, readout, RAM buffering, and signal processing algorithms. Additionally, the role will involve developing and optimizing FPGA applications across various payload RDT&E projects and spacecraft bus development. The ideal candidate should have a strong background in digital design, VHDL/Verilog/SystemVerilog programming, and experience with FPGA development tools and methodologies.
Note: This is an on-site position. We do not offer remote or hybrid work arrangements.
- Department
- Payload R&D
- Employment Type
- Full Time
- Location
- Irvine, California
- Workplace type
- Onsite
- Compensation
- $150,000 - $200,000 / year
- Reporting To
- Jackson Parker
Key Responsibilities
- Design, implement and verify RTL code for image sensor configuration and high-throughput readout
- Develop and optimize RAM buffering techniques for efficient data handling
- Collaborate with hardware and software teams to define FPGA requirements and specifications
- Support RDT&E efforts of new space-based payloads
- Implement and optimize signal processing and routing algorithms in RTL
- Integration of RTL designs onto FPGA/SoC platforms
- Perform synthesis, place and route, timing analysis and FPGA implementation
- Verification and validation of RTL designs on prototype and flight hardware
- Collaborate with multidisciplinary team to ensure system functionality
- Lead verification and validation of FPGA based boards
Qualifications
Required:
- 2+ years of experience developing HDL for FPGAs in a professional environment
- Bachelor’s degree in electrical engineering, computer science, mathematics or a related field
- Proficiency in RTL design using VHDL, Verilog and/or SystemVerilog
- Proficiency working with FPGA design tools
- Strong understanding of digital design principles and methodologies.
- Must be able to obtain a Secret and/or a TS/SCI clearance.
- Must be available to work extended hours and weekends as needed to meet critical deadlines
Preferred:
- Experience implementing HDL for precise timing applications
- Experience with high-speed serial interfaces (e.g. GbE, PCI-E, LVDS)
- Experience with low-speed serial interfaces (e.g. RS422, CAN, SPI)
- Experience with dynamic RAM controllers and layout.
- Knowledge of RAM architectures and efficient buffering techniques
- Experience with image sensors and camera systems
- Experience implementing computer vision and digital signal processing algorithms in RTL
- Experience with Xilinx and Microchip FPGA systems and toolchains
- Experience with networking protocols and packet processing (Ethernet 802.3, IPV4/IPV4, UDP, TCP)
- Proficiency in software development (C/C++/Python)
- Strong documentation and collaboration skills
- Strong problem-solving skills and attention to detail.
- Familiarity with hardware description languages (HDL) and high-level synthesis (HLS) tools.
ITAR Requirements:
- This position may include access to technology and/or software source code that is subject to U.S. export controls. To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Benefits
- Health Insurance: Comprehensive medical, dental, and vision coverage.
- Retirement Plans: Access to a 401(k) plan.
- Paid Time Off: Generous vacation days, personal days, and holidays to ensure you have time to recharge.
- Professional Development: Opportunities for ongoing training, workshops, and courses to advance your skills and career growth.
- Team Building Activities: Regular social events, team outings, and company-sponsored activities to foster a positive work environment.
- Diverse and Inclusive Culture: A commitment to diversity and inclusion, with initiatives to support a welcoming and equitable work environment.
Turion Space is an Equal Opportunity Employer; employment with Turion Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants wishing to view a copy of Turion’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department.
About Turion Space
Turion Space was founded with the vision of propelling humanity toward an interplanetary future. To realize this vision, we are developing cutting-edge spacecraft focused on space transport, orbital debris removal, and Space Domain Awareness (SDA) to ensure ongoing value creation. Our mission centers on advancing spacecraft for low-earth orbit (LEO) and enhancing SDA, which are essential for both current space operations and future interplanetary exploration. By prioritizing high delta-V per dollar, we aim to maximize efficiency and cost-effectiveness in space transportation. We successfully launched our DROID.001 satellite in June 2023, with DROID.002 and DROID.003 scheduled for 2025.
Our Hiring Process
Stage 1:
Applied
Stage 2:
Review
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